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ROG STRIX z370-e BIOS ASPM bug, what to do?

renordw
Level 7
In BIOS, there is a setting that allows the OS to control the ASPM of PCIe devices, including the USB ports.

However, when I make these changes, only some of the USB ports come under control of the OS. If I examine the PCI Configuration Space, several of the registry values indicate that ASPM is disabled.

The root ports that are obeying BIOS are the following. When I change their controls to L0sL1, the registry value changes from 40 (disabled) to 43 (L0sL1)

00:1c.0 PCI bridge: Intel Corporation 200 Series PCH PCI Express Root Port #1
00:1c.2 PCI bridge: Intel Corporation 200 Series PCH PCI Express Root Port #3
00:1d.0 PCI bridge: Intel Corporation 200 Series PCH PCI Express Root Port #9



The following do NOT obey BIOS instructing them to be controlled by the OS. When I change their controls to L0sL1, the registry value does not change, they remain 40 (disabled)

00:1c.4 PCI bridge: Intel Corporation 200 Series PCH PCI Express Root Port #5
00:1c.6 PCI bridge: Intel Corporation 200 Series PCH PCI Express Root Port #7

Likewise endpoints for these two do not obey BIOS, and remain 40 no matter what the BIOS setting is.

04:00.0 USB controller: ASMedia Technology Inc. Device 2142
05:00.0 USB controller: ASMedia Technology Inc. Device 2142
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renordw
Level 7
I found the probable cause of the bug.

When SSDT7 is disassembled, it has a bunch of nonsense in it:

Lines 78-86:

77 PGCE = DerefOf (Arg3 [Zero])
78 PGCD = DerefOf (Arg3 [One])
79 OLDV = \_SB.GGOV (0x02010016)
80 \_SB.SGOV (0x02010016, PGCE)
81 If ((PGCD > Zero))
82 {
83 Sleep (PGCD)
84 \_SB.GGOV (0x02010016)
85 OLDV
86 }

The declaration of OLDV makes no sense

Likewise 102-112:

102 DFUE = DerefOf (Arg3 [Zero])
103 DFUD = DerefOf (Arg3 [One])
104 OLDV = \_SB.GGOV (0x02010014)
105 \_SB.GGOV (0x02010014)
106 DFUE
107 If ((DFUD > Zero))
108 {
109 Sleep (DFUD)
110 \_SB.GGOV (0x02010014)
111 OLDV
112 }

Declaration of DFUE and OLDV on 106 and 111 respectively, are nonsense.