I said I am not sure what the numbers are, just saying it might be interesting.

"not noticeable most times".. well unless you have a PCIe3 graphics card you are not going to find out.

I know the latency for every signal through the bridge chip adds more than 120ns for each pulse on the clock. For bidirectional communication between CPU and GPU, this might be a big issue or it might not.

All I am saying is what this means will probably not be understood until Anandtech and TomsHardware etc get native PCIe3.0 and compare it all in a year or so. Personally I can't wait to see the numbers because I think it might be good and will probably swap when native becomes a reality. I was actually following PCIe3 for the last 5 years, but succumed to the board below because it is pretty tight, but will swap to PCIe3.0 when I can get a native PCIe3 card and board.

and if you want to find fanboy of PCIe3.0.. then I sure am it lol. I personally imagine with native and no bridge chip or PCIe2 overhead things like software GPU sharing and software physics coordination between components will become a high performance reality and a whole new world might open up... but I imagine a lot.

There are not any PCIe 3.0 devices to test with. Doubtful that any company is going to join the players already taking part in this circus by making unsubstantiated comments.

It is not really about Gen3 being popular or not. The rapid change and socket changes will pause when they are done as the socket changes were to accommodate this new architecture piece meal, so I foresee a large uptake from the mainstream if they stop changing the socket, just like LGA 775. Intel have been working towards it for ages and 2012 was always flagged as the release date for 3 and so far they are only three months behind.

p.s. these bridged boards will be faster and may negate the latency because PCIe2.1 cards can use some PCIe3.0 features, so again I am just pointing out that it will be interesting to read some of the reviews that will come out.

Not sure what you mean, but the NF200 is a PCIe2.0 splitter. Splits the card side for 2 or 3 cards all at 16x, floods the cpu side using fifo 8x. I think. So you get full utilization of the CPU side shared between all slots and 16x between cards which is where most of the work is done.

With PCIe3 you get all buses 16x to the CPU, but what I am talking about is the improved latency you will also get from the CPU to the cards and back. The bridge chip might be OK for some of this I am just assuming what comes next will be better for that latency as well, time will tell.

PCI-E 3.0 is backwards compatible with 2.0, not sure whether that means native will always have some sort of bridge or gate, but everything will work with everything. I am not going to read much more on 3 until next year, so am not really sure, just guessing based on limited knowledge.